Senior RTL Designer

ROLE : Senior RTL Designer

LOCATION : Barcelona, Spain

SALARY : Negotiable

DURATION : Permanent

Description

We are looking for an engineer with deep expertise in RTL design or microarchitecture to contribute to a cutting-edge RISC-V project on an advanced technology node. The role focuses on PCS and FEC implementation and requires a hands-on approach where you take ownership of solving complex design challenges down to the RTL level. You will collaborate closely with the architecture and verification teams to deliver robust, high-performance designs.

Responsibilities

• Implement and optimize RTL for RISC-V components
• Design and verify PCS and FEC algorithms
• Integrate and test Ethernet SERDES PHY and controller blocks
• Apply timing constraints and perform thorough timing analysis
• Collaborate with cross-functional teams to ensure design correctness
• Mentor and guide junior engineers where appropriate

Requirements