Overview
Job Title : RISC-V MCU Architect
We are seeking a highly skilled RISC-V MCU architect to join our team. As a key member of our engineering group, you will be responsible for defining the overall architecture of our next-generation chip solutions.
Your primary focus will be on ensuring that our RISC-V MCU meets target market needs while staying cost-efficient, low-power, and standard-compliant.
Responsibilities
- Translate market needs into hardware specifications, defining RISC-V ISA extensions, performance targets, low power modes, target cost per chip and manufacturing process node
- Ability to translate use cases on performance / power / cost requirements
- In alignment with business opportunities, select core type (from available options in the market to in-house designed cores), defining memory hierarchies, peripherals specifications, interconnect architecture and security features
- Define RISC-V toolchain and RTOS / OS support, maintain SDKs and HAL for developers and define debug and profiling support
- Lead and drive the power, performance, area trade off definition with engineering team
- Frame design principles for testability and manufacturing, including compliance with regulations and industry standards, while keeping an eye on RISC-V Foundation standards
- Cross functional collaboration with design, integration and validation engineers with the focus on serving customers expectations and go to market strategies
Qualifications
5+ years of experience in semiconductors-based product developmentMaster's degree in electronic engineering, computer engineering, telecoms engineering or other discipline with focus on semiconductor designDeep understanding of RISC-V ISA and extensions, interrupt controllers, debug modules, privilege levels with experience evaluating off-the-shelf and custom RISC-V coresSoC integration experience, including memory hierarchy design and power domain modesBackground in low power and security techniques (e.g., clock and power gating, wake up latency minimization and secure boot, update and RoT concepts, …)RISC-V toolchain practical understanding, in combination with RTOS, HAL and FW / HW co-design principles awarenessPre-silicon verification strategies know-how, post silicon bring-up and power measurements techniques awarenessFamiliarity with the different IoT market verticals and applications where the embedded devices ecosystem plays strongerSkilled in semiconductor lifecycle phases, milestones and deliverables, from spec to mass production, including awareness on regulations and industrial standardsArchitecture technical documentation definition and development, team cross functional communication, negotiation and decision making under constraintsCustomer first mindset, translating market needs on product requirements within the go-to-market timelineDesirable Qualifications
Pursuing a PhD in electronic engineering, computer engineering, telecoms engineering or other discipline with focus on semiconductor design can be advantageous in this role.A background in mixed-signal integration with RF front ends and RF subsystems can also be beneficial.Research interest in techniques driving low power and security KPI beyond industry standards is desired.Custom instruction set RISC V extensions definition and development experience can also be valuable.Chiplet-based architecture for modular SoCs knowledge can be an asset.#J-18808-Ljbffr