Overview
A senior-level verification expert is sought to join a rapidly growing semiconductor company. The ideal candidate will have experience with SystemVerilog and UVM, as well as proficiency in scripting languages such as Python, Perl, Bash, or TCL.
Main Responsibilities
- Design and implement verification environments for complex digital circuits
- Develop and maintain regression test suites using scripting languages
- Collaborate with cross-functional teams to identify and resolve technical issues
- Contribute to the development of new verification methodologies and tools
Qualifications
Masters degree in Computer Science, Electrical Engineering, or related field4+ years of relevant experience in verification engineeringProficiency in SystemVerilog and UVMKnowledge of scripting languages (Python, Perl, Bash, TCL) and regression toolsExperience with simulation and simulation toolsKnowledge of revision control methodology and tools (git, svn)Strong problem-solving skills and attention to detailExcellent communication and teamwork abilitiesWhat We Offer
Competitive salaryFlexible work schedulesOpportunities for career growth and professional developmentDynamic work environment#J-18808-Ljbffr