Overview
A senior-level verification expert is sought to join a rapidly growing semiconductor company. The ideal candidate will have experience with SystemVerilog and UVM, as well as proficiency in scripting languages such as Python, Perl, Bash, or TCL.
Main Responsibilities
Design and implement verification environments for complex digital circuits
Develop and maintain regression test suites using scripting languages
Collaborate with cross-functional teams to identify and resolve technical issues
Contribute to the development of new verification methodologies and tools
Qualifications
Masters degree in Computer Science, Electrical Engineering, or related field
4+ years of relevant experience in verification engineering
Proficiency in SystemVerilog and UVM
Knowledge of scripting languages (Python, Perl, Bash, TCL) and regression tools
Experience with simulation and simulation tools
Knowledge of revision control methodology and tools (git, svn)
Strong problem-solving skills and attention to detail
Excellent communication and teamwork abilities
What We Offer
Competitive salary
Flexible work schedules
Opportunities for career growth and professional development
Dynamic work environment
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Senior Verification • Barcelona, Catalonia, España