Senior design verification engineer

Senior Verification Engineer - RISC-V Start-Up Are you passionate about microprocessor architecture and ready to make an impact as a Senior Verification Engineer? Interested in a company that’s pushing the boundaries of high-performance RISC-V cores? As a Senior Verification Engineer, you’ll be a key player in the Verification Team, ensuring the accuracy and functionality of complex digital designs using cutting-edge methodologies and tools. This is your opportunity to work on groundbreaking projects that shape the future of AI, machine learning, and semiconductor technology as a Senior Verification Engineer. Required Experience : Proven experience in seeing through projects including multiple successful tape-outs Experience working in a UVM-based verification environment Proficiency in System Verilog Strong skills in scripting languages (Python, Perl, Bash, TCL) Knowledge of revision control systems (git, svn) Experience with both formal verification is a plus Fluent English (speaking and writing skills) Knowledge in one or more of the following areas is essential : Coherent systems and CHI protocol Cache structures and parameters PCle and high-speed communications protocols Email - Tel - Linked In -