Senior Digital ASIC Design Engineer

Senior Digital ASIC Design Engineer - Barcelona

I am seeking a highly experienced Senior ASIC Dsign Engineer to join a leading organisation at the forefront of semiconductor innovation. This is an exceptional opportunity to be part of a dynamic and multicultural team, working on cutting-edge SoC designs that will shape the future of AI, HPC, and other advanced technologies.

Requirements :

• Bachelors or Masters in Electrical Engineering or a related field
• Proven experience in 3+ successful tapeouts
• Proficiency in RTL design (Verilog / SystemVerilog)
• Experience in semiconductor IP design
• Experience with TCL

This client also has a site in Rome and Ghent, so this position can also be based there.

Email -

Tel -

LinkedIn -