Senior verification engineer

About the RoleJoin a fast-growing European semiconductor company developing customizable high-performance RISC‐V cores with vector / tensor acceleration and proprietary high-bandwidth memory IP. You'll lead RTL verification for next-gen AI / ML compute platforms.Key Responsibilities : Develop and execute UVM-based testbenches for complex IP and So CsApply formal and dynamic verification techniquesDrive coverage analysis, regressions, and debugCollaborate closely with design and architecture teamsAutomate verification workflows (Python, Bash, Tcl)Requirements : Master’s or Ph D in EE / CS5–8+ years in digital verification (System Verilog / UVM)Strong scripting and simulation tool experienceFluent English (C1)Team player with excellent problem-solving skillsNice to Have : RISC-V core or So C verification experienceKnowledge of vector / tensor compute or memory architectures