Overview
Join to apply for the Hardware RTL / Verification Engineer (FIB - Màster) role at Universia España
Location : Sant Esteve Sesrovires, Catalonia, Spain
Responsibilities
- As an RTL Engineer, you will work within the Design Team and play a crucial role in ensuring the implementation and functionality of complex digital designs at the register-transfer level, using advanced design methodologies and tools for development.
- As a Verification Engineer, you will work within the Verification Team and play a crucial role in ensuring the correctness and functionality of complex digital designs at the register-transfer level, using advanced verification methodologies and tools to validate designs.
Background / Qualifications
We are looking for Engineers with this background :
Master in Information and Retrieval in Computer Science, specialization High Performance Computing or Advanced Computing (graduates or last semester).Valuable Subjects
Master in Information and Retrieval in Computer Science (specialization High Performance Computing) : PD, APA, PAMaster in Information and Retrieval in Computer Science (specialization Advanced Computing) : AVLSIRequirements
Basic knowledge of hardware description languages VHDL / SystemVerilogKnowledge of scripting languages (Python, Perl, Bash, etc.)Knowledge of version control methodologies and tools (git)Problem-solving skills and attention to detailCommunication skills and teamworkSeniority level
InternshipEmployment type
Full-timeJob function
Quality AssuranceIndustries
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