About the Role
We are seeking a Senior Functional Verification Engineer to join an innovative semiconductor company developing next-generation AI and HPC SoCs. You'll collaborate with architecture, design, and software teams to ensure top system performance, driving UVM-based verification, HW / SW co-debug, and simulation acceleration in a dynamic, growth-focused environment.
Key Responsibilities
- Review and analyse system and architecture requirement documents.
- Develop and maintain verification environments in SystemVerilog / UVM / SystemC / C++.
- Implement and execute verification plans, including design bring-up, regression, and debug.
- Create and execute test cases to verify functionality, performance, and robustness (Embedded C / SystemVerilog).
- Identify and debug issues found during verification, collaborating closely with design and architecture teams.
- Contribute to methodology improvements and drive verification closure through coverage analysis and regression testing.
- Mentor and guide junior verification engineers.
Qualifications
Master's degree in Electronics, Computer Engineering, or related field.7+ years of experience in Verification of complex SoC or IP.Strong knowledge of SystemVerilog / UVM and SystemC / C++.Experience with constrained random testing, functional coverage, and design debug.Familiarity with Formal Verification, UPF, and HW / SW co-verification.Scripting skills (Bash, Perl, Python).Fluent in English (written and spoken).Nice to Have
Firmware-based verification experience.Knowledge of metrics-driven verification and standard IPs (NoC, PCIe, DDR, HBM).Soft Skills
Team-oriented and adaptable, comfortable working across diverse cultures.Strong communication, problem-solving, and collaboration skills.Please let me know a convenient time to connect, or you can simply send your CV to tee@microtech-global.com to start the conversation.