About the Role
Join a fast-growing European semiconductor company developing customizable high-performance RISC‑V cores with vector / tensor acceleration and proprietary high-bandwidth memory IP . You'll lead RTL verification for next-gen AI / ML compute platforms.
Key Responsibilities :
- Develop and execute UVM-based testbenches for complex IP and SoCs
- Apply formal and dynamic verification techniques
- Drive coverage analysis, regressions, and debug
- Collaborate closely with design and architecture teams
- Automate verification workflows (Python, Bash, Tcl)
Requirements :
Master’s or PhD in EE / CS5–8+ years in digital verification (SystemVerilog / UVM)Strong scripting and simulation tool experienceFluent English (C1)Team player with excellent problem-solving skillsNice to Have :
RISC-V core or SoC verification experienceKnowledge of vector / tensor compute or memory architectures