Analog Design Engineer

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Neuron IP is actively seeking an

Analog Design Engineer

to be an integral part of our team, focusing on designing, refining, and innovating cutting‑edge high‑speed UCIe chiplets for use in AI / ML, HPC, and automotive. This role is for you if you are passionate about the design of analog circuits for high‑speed serial connectivity.

The Role : In our rapidly expanding analog and mixed‑signal R&D group, you'll tackle challenges in designing high‑speed analog circuits using the latest FinFET and GAA CMOS technologies. You'll play a key role in implementing SerDes standards into efficient circuit designs, collaborating closely across disciplines with system architects, digital designers, physical designers, as well as test and applications engineers to achieve first‑pass silicon success. Neuron IP offers a state‑of‑the‑art working environment where every role is key to our technical success.

The Person : We are looking for someone with at least 4 years of focused, practical experience in analog IC design or a related field. You will have a desire for constant learning and growth, a zeal for technical excellence, and an adaptable, positive mindset. Your communication skills will shine in meetings, presentations, and written documentation. You are comfortable learning new skills for your role, and flexible enough to work with colleagues situated in different time zones. We value creative thinkers and detail‑driven problem‑solvers who take the initiative to do what needs to be done.

The Future : Neuron IP is a company committed to training and growing your career on the job. You will work with experts in the various fields of design and layout, and will be given the tools, training and exposure to quickly grow you into one such expert in the field with broad experience in analog circuit design, and a deep expertise in high‑speed wireline communications architectures.

Responsibilities :

Analyze SerDes standards to formulate cutting‑edge transceiver architectures and detailed sub‑block specifications.

Develop and lead innovative circuit architectures to enhance power efficiency, reduce size, and improve performance.

Collaborate with various team members to refine design and verification processes, ensuring high‑quality and efficient design outputs.

Supervise physical layout processes to mitigate issues related to parasitics, device stress, and process variations.

Communicate simulation data within the team and externally, including at industry events or customer meetings.

Proficiency in analog verification and testbench development, with an emphasis on extracting detailed quantitative data to inform a data‑driven decision‑making process.

Document design methodologies and test plans.

Contribute to the electrical characterization of the SerDes IP product and recommend design improvements.

Requirements :

PhD, or Master’s in Electrical or Computer Engineering (or related field) with practical analog IC design experience.

Minimum English level (CEFR) of C1.

Strong candidates will possess :

Extensive design knowledge in various SerDes sub‑circuits, including CTLE, DFE, FFE, DAC / ADC based transmitters and receivers, PLL, DLL, Phase Interpolators, voltage‑controlled oscillators, samplers, voltage / current‑mode drivers, and bandgap references.

Understanding of single‑ended and differential signaling techniques, applications and their impact on performance.

Solid understanding of transistor‑level circuit design and CMOS / FinFET fabrication processes.

• Familiarity with SerDes standards;

especially, die‑to‑die interface, and their impact on end‑user applications.

Experience with high‑speed digital design elements like Serializer / De‑serializer.

Understanding of ESD challenges in circuit design and layout.

Proficient in analog‑digital interactions to optimize circuit performance.

Knowledge of reliability design (EM, IR, aging) and layout considerations (matching, reliability, proximity effects).

Skilled in schematic entry, physical layout, and design verification tools.

Proficient in SPICE simulators and simulation methodologies.

Experience in Verilog‑A for analog behavioral modeling, and familiarity with scripting languages like TCL, Perl, C, Python, MATLAB.

Strong communication, presentation, and documentation skills.

Neuron IP is a leader in Silicon IP, integrating advanced capabilities into SoCs efficiently. We're driving innovation in areas such as AI, the cloud, chiplets, 5G, and IoT. If you're passionate about pioneering technology, Neuron IP is your platform to excel.

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