Field-Programmable Gate Arrays Engineer

The team is responsible for integrating the company IP cores into FPGA-based emulation environments as well as to develop new emulation features, providing the company with state of the art emulation capabilities, enabling it to demonstrate the full potential of the IPs being developed. Given the complexity of the task in hand, this work requires skilled FPGA engineers with experience in designing and mapping logical resources in very large devices, achieving the target timing margins while attaining optimal device usage. Alongside, these tasks require close collaboration with other company groups, including software and firmware teams, who make extensive use of these emulation platforms.

Responsibilities :

• Integrate RTL code releases into new FPGA designs;
• Configure FPGA peripherals for maximizing the performance of the RISC-V prototyping solutions;
• Implement new RTL modules to provide the RISC-V core under emulation / prototyping with the optimal I / O configurations;
• Interact with other teams to understand their requirements for new features and on how that can be leveraged into the FPGA designs;
• Maintain and further improve our in-house FPGA resource pool;
• Provide support and develop new features to be used in demonstration systems for company clients.

Requirements :

Essential Knowledge :

Valued Knowledge :