Senior Functional Verification Engineer

About the Role

We are seeking a Senior Functional Verification Engineer to join an innovative semiconductor company developing next-generation AI and HPC SoCs . You’ll collaborate with architecture, design, and software teams to ensure top system performance, driving UVM-based verification, HW / SW co-debug , and simulation acceleration in a dynamic, growth-focused environment.

Key Responsibilities

• Review and analyse system and architecture requirement documents.
• Develop and maintain verification environments in SystemVerilog / UVM / SystemC / C++ .
• Implement and execute verification plans, including design bring-up, regression, and debug.
• Create and execute test cases to verify functionality, performance, and robustness (Embedded C / SystemVerilog).
• Identify and debug issues found during verification, collaborating closely with design and architecture teams.
• Contribute to methodology improvements and drive verification closure through coverage analysis and regression testing.
• Mentor and guide junior verification engineers.

Qualifications

Nice to Have

Soft Skills

Please let me know a convenient time to connect, or you can simply send your CV to tee@microtech-global.com to start the conversation.