(Hybrid) FPGA Engineer

GTD is a high-tech company, committed to the design, integration, and operation of complex, mission-critical applications and systems throughout the world.

We perform turnkey projects, engineering services and product development for our customers, developing state-of-the-art systems in the Space, Aerospace, Energy, Scientific Facilities and Defense and Security sectors. With a end-to-end approach, we seamlessly navigate the entire service cycle, from meticulous validation and ongoing maintenance to effective obsolescence management.

Here you will find more information about GTD Group :

The role :

GTD Science, Infrastructures, and Robotics (GTD SI&R) is the leading provider of high-quality, high-reliability software solutions, robotics’ control systems, custom electronics, and edge computing. With its unique system and software engineering capabilities, GTD SI&R is the most reliable supplier of control, supervision, analysis, and decision support systems for real-time, large, and critical applications. The company's solutions (Control Systems, Bespoke Electronics, Embedded Systems, Control Centers) are integrated into the most significant "Big Science" international projects (including ITER and CERN) and into several of the largest Green Power Generation companies in the world.

Here you will find more information about us :

We are seeking an experienced FPGA Engineer to contribute as a member of our dynamic team, driving innovative design solutions for high-performance systems. You’ll work closely with cross-functional teams, aligning FPGA development with best practices in verification, synthesis, and automation.

Position activities :

• Define the FPGA detailed specification.
• Define the FW architecture to run within the FPGA.
• Design your own IP cores.
• Perform coding rules conformance check (linting).
• Design the testbenches for the IP cores.
• Validate the IP cores by simulation & by hardware.
• Perform functional & code coverage.
• Perform synthesis, implementation and bitstream generation.
• Automate the previous processes through script languages.

Your profile :

3 years of experience developing IP cores along with their testbenches, using VHDL or (System)Verilog.

3 years of experience working with FPGA development tools (mainly Xilinx Vivado IDE, Altera Quartus IDE).

Nice to have :

What do we offer?

We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, etc.