My client is looking for a Senior Memory Design Engineer, you play a crucial role in designing and developing memory subsystem solutions for their semiconductor portfolio.
You will work within the Memory Design Team and work closely with other teams’ highly skilled engineers to create efficient and high-performance memory subsystems that are essential for modern designs.
Industrial experience 5+ years
Proven experience in design and / or integration of memory controllers.
Proficiency in RTL design using Verilog or VHDL
Experience with basic block level testing
Master or PhD
Knowledge of scripting languages (Python, Perl, Bash, TCL).
Knowledge of revision control methodology and tools (git, svn).
Apply Now for immediate Consideration.
Design Engineer • Castro, Provincia de Lugo, España