Senior Verification Engineer

We have had a very exciting opportunity for a Senior Verification Engineer in Barcelona, Spain. Role : Senior Verification Engineer Location : Barcelona, Spain Duration : Permanent Salary : Negotiable About the company : European provider of advanced RISC-V IP cores, specializing in high-bandwidth, high-performance designs with vector units for machine learning and AI applications. This is a great opportunity to work on state-of-the-art microprocessor architecture in a collaborative, innovative environment. As part of the Verification Team, you will play a key role in validating complex RTL designs using advanced verification methodologies. Key Responsibilities

• Perform block-level, sub-system, and top-level RTL verification
• Develop and execute verification plans using SystemVerilog and UVM
• Create and maintain testbenches, test cases, and assertions
• Use formal and dynamic verification techniques
• Collaborate closely with cross-functional teams
• Maintain thorough documentation and help improve verification flows Minimum Requirements :
• 6 years of industrial experience in digital design verification
• Advanced degree (Master’s or PhD) in Electrical / Computer Engineering or related field
• Strong proficiency in SystemVerilog, UVM, and simulation tools
• Experience with scripting languages (Python, Perl, Bash, TCL) and regression tools
• Familiarity with version control systems (git, svn)
• Strong analytical and debugging skills
• Excellent English communication (C1 level or above)
• Team-oriented mindset with attention to detail Compensation & Benefits :
• Flexible working hours
• Competitive salary
• Supportive, learning-focused environment
• Opportunities for career growth and advancement
• Based in beautiful Barcelona
• Visa sponsorship available if required