Global Quality Lead

Senior DFT and Post-Silicon Lead – Join a Groundbreaking Semiconductor Team in Europe

1 billion euros to boost the development of semiconductor technologies in Europe, creating more than 8,700 direct job opportunities and cementing microchips as the backbone of Europe’s industrial future.

Our client, a direct collaborator in the RISC-V architecture, is a key player in this transformation—challenging the ARM monopoly and building the open, AI-ready architectures of tomorrow. They are now seeking a Senior DFT and Post-Silicon Lead to join their internal team and drive their mission to deliver high-quality, high-performance SoCs and SiPs for mass production.

As the agency leading the selection process, we’re looking for exceptional talent ready to step into this exciting leadership role and help shape the future of semiconductor technology.

You’ll gain exposure to advanced RISC-V and SoC designs, have access to their in-house academy for continuous learning, and contribute to projects that will define the future of AI and connectivity.

As Senior DFT and Post-Silicon Lead, you’ll own the entire DFT implementation process, ensuring a seamless flow from pre-silicon design to mass production. You’ll lead and mentor a team of talented engineers, champion innovation, and collaborate across design, validation, and operations to meet and exceed product goals.

Flexible work schedules – freedom to work your best

Free coffee, snacks, and Spanish lessons – immerse yourself in Barcelona

Visa sponsorship if needed – open to global talent

All of this in the vibrant city of Barcelona – a global hub for innovation and lifestyle

Lead and mentor the DFT and Post-Silicon engineering teams

Optimize test methodologies to reduce costs and improve yield

Develop and implement comprehensive test plans from pre-silicon to mass production

Collaborate across teams to ensure seamless test and manufacturability integration

Bachelor’s, Master’s, or PhD in Computer Science, Electrical Engineering, or a related field

Proven experience with multiple tape-outs of high-performance SoCs or SiPs for mass production

Strong background in post-silicon test optimization and yield analysis

Experience defining and implementing test strategies for high-volume production

Reports to : Physical Implementation Team Manager

Leads : DFT and Post-Silicon team members

If you’re ready to join our client’s internal team and lead DFT and post-silicon activities in one of Europe’s most dynamic environments, let’s talk.