PostDoc position on RISC-V and for safety-critical applications

Organisation / Company Universidad Politécnica de Madrid (UPM) Research Field Computer science » Computer architecture Researcher Profile Recognised Researcher (R2) Country Spain Application Deadline 22 Feb 2026 - 00 : 00 (UTC) Type of Contract To be defined Job Status Negotiable Is the job funded through the EU Research Framework Programme? Not funded by a EU programme Is the Job related to staff position within a Research Infrastructure? No

Offer Description

In the Centre of Industrial Electronics (CEI) at Universidad Politécnica de Madrid (UPM), we are looking for highly motivated and talented PostDoc researchers in the field of domain-specific adaptive processing systems based on the RISC-V ISA. As part of the position, the candidate will be involved in activities related to the following topics :

• RISC-V ISA extensions and hardware accelerators for safety-critical applications.
• Application of safety techniques for RISC-V-based SoCs (Dual-lock, ECCs, scrubbing, etc.)
• Customization to Space and Defense applications.
• Physical design and ASIC implementations of RISC-V based SoCs.
• Dynamic Reconfiguration and embedded FPGAs to load ISA extensions on demand.

The selected candidate will be part of a highly international and enthusiastic team. These positions will be funded within the scope of different private and public-funded projects (European and Spanish). The 3-year PhD contract includes health insurance coverage and a gross salary between 35000€ and 45000€, depending on the candidate's previous experience. Expenses for attending conferences, summer schools, and workshops will also be covered.

BASIC QUALIFICATIONS : Master’s degree in Electrical / Electronics / Computer Engineering, Computer Science, Physics, or similar. Previous research activities in the fields of interest will be highly appreciated.

PREFERRED SKILLS : Very good knowledge of digital hardware design and VHDL; High-level synthesis tools for FPGAs; C / C++ programming for embedded systems. Experience with RISC-V processors and cryptographic solutions is also valuable. A high level of English is required, Spanish is optional.

POSITION AVAILABLE : The selection procedure will be maintained open until the position is covered. The starting date is flexible, but preferred ASAP.

INFORMATION : If you are interested in this position and want to have more details about it, please contact Dr. Andrés Otero ( ), including the reference (PostDoc_RISCV) in the subject of your mail. For the application, the following documents will be required :

J-18808-Ljbffr

J-18808-Ljbffr